In recent years silicon, the workhorse of transistor based industry, has made a dra-
matic comeback as a host material for spin qubits, both for electrons and nuclei. The
favourable properties of group IV elements towards spin-qubits have lead scientists to start investigating qubits in SiGe nanostructures. To overcome the limits of quantum
control and decoherence acting on the qubits, error correction schemes have been devised that rely on a so called surface code architecture: a 2d array of qubits with nearest neighbour interaction . This can be realized by localizing spins in quantum dots as suggested by Loss and DiVincenzo . The spin confinement is achieved due to the band offset of the semiconductor heterostructure, creating a quantum well, and the electric fields created by the gates on top of the heterostructure. Great success has been achieved for electrons in two-dimensional electron gases (2DEGs) and a set of universal quantum gates has already been demonstrated in 2014 [3,4]. These systems rely on a microwave antenna to provide an alternating magnetic field for qubit manipulation, which allows only slow operations to be performed.
Holes, especially in germanium, offer the advantage of having a large spin-orbit interaction (SOI) which allows all electrical manipulation of the spin, greatly enhancing the operation speed and reducing the fabrication demands. Moreover, effective
masses comparable to GaAs further relax the fabrication constraints faced by the Si community  . Furthermore, recent experiments have shown that mobilities in Ge quantum wells can easily exceed 106 cm2/Vs .
In our group we investigate qubits and superconductor-semiconductor hybrid devices in SiGe/Ge heterostructures where holes are confined in a two-dimensional hole gas (2DHG). Figure (a) displays a sketch of such a heterostructure where a thin layer, typically 20 nm, is embedded between two layers of SiGe. The top SiGe layer is between 20 and 40 nm thick and covered by SiO2. The metallic top gates are deposited on top of this oxide layer. Figure (b) shows an SEM picture of a typical gate structure.
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